UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 650

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2) When LVI is ON upon power application (option byte: LVIOFF = 0)
648
(when X1 oscillation
oscillation clock (f
Internal reset signal
Internal high-speed
system clock (f
Notes 1.
Caution Set the low-voltage detector by software after the reset status is released (see CHAPTER 21
Remark V
V
Supply voltage
V
POC
LVI
High-speed
is selected)
= 2.07 V (TYP.)
= 1.59 V (TYP.)
1.8 V
CPU
2.
3.
4.
(V
MX
Note 1
V
IH
DD
0 V
)
)
LVI
LOW-VOLTAGE DETECTOR).
V
Figure 20-2. Timing of Generation of Internal Reset Signal by Power-on-Clear Circuit
)
Operation
The operation guaranteed range is 1.8 V ≤ V
state when the supply voltage falls, use the reset function of the low-voltage detector, or input the low
level to the RESET pin.
The internal high-speed oscillation clock and a high-speed system clock or subsystem clock can be
selected as the CPU clock. To use the X1 clock, use the OSTC register to confirm the lapse of the
oscillation stabilization time. To use the XT1 clock, use the timer function for confirmation of the lapse
of the stabilization time.
The internal reset processing time includes the oscillation accuracy stabilization time of the internal
high-speed oscillation clock.
The following times are required between reaching the POC detection voltage (1.59 V (TYP.)) and
starting normal operation.
• When the time to reach 2.07 V (TYP.) from 1.59 V (TYP.) is less than 6.17 ms:
• When the time to reach 2.07 V (TYP.) from 1.59 V (TYP.) is greater than 6.17 ms:
LVI
POC
: LVI detection voltage
stops
A POC processing time of 1.92 to 6.33 ms is required between reaching 1.59 V (TYP.) and starting
normal operation.
A reset processing time of 43 to 160
normal operation.
: POC detection voltage
Note 4
Wait for oscillation
accuracy stabilization
Reset processing
(V
reset (default)
POC processing
to be used for
(43 to 160 s)
LVI
oscillation clock)
(internal high-speed
Set LVI
Normal operation
CHAPTER 20 POWER-ON-CLEAR CIRCUIT
specified by software.
= 2.07 V)
Starting oscillation is
Note 3
and Low-Voltage Detector (2/2)
μ
Note 2
User’s Manual U17893EJ8V0UD
Reset period
(oscillation
stop)
Wait for oscillation
accuracy stabilization
Reset processing (43 to 160 s)
used for interrupt
μ
Set LVI to be
s is required between reaching 2.07 V (TYP.) and starting
DD
oscillation clock)
(internal high-speed
Normal operation
≤ 5.5 V. To make the state at lower than 1.8 V reset
specified by software.
Starting oscillation is
Note 3
Note 2
μ
Reset period
(oscillation
stop)
Note 4
Wait for oscillation
accuracy stabilization
(V
to be used for
reset (default)
LVI
Set LVI
= 2.07 V)
oscillation clock)
(internal high-speed
Reset processing
Normal operation
POC processing
(43 to 160 s)
specified by software.
Starting oscillation is
voltage (V
Change LVI
Note 3
detection
μ
Note 2
LVI
)
Operation stops