UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 403

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
Figure 12-38. Timing Chart of Master Reception (in Continuous Reception Mode) (Type 1: DAPmn = 0, CKPmn = 0)
register mn
SCKp pin
(4) Processing flow (in continuous reception mode)
INTCSIp
MDmn0
TSFmn
SDRmn
BFFmn
SIp pin
SSmn
SEmn
STmn
Caution The MDmn0 bit can be rewritten even during operation.
Shift
Remarks 1. <1> to <8> in the figure correspond to <1> to <8> in Figure 12-39 Flowchart of Master
<1> <2>
However, rewrite it before receive of the last bit is started, so that it has been rewritten before
the transfer end interrupt of the last receive data.
2. m: Unit number (m = 0, 1), n: Channel number (n = 0 to 2), p: CSI number (p = 00, 01, 10, 20)
Reception (in Continuous Reception Mode).
Write
<3>
Dummy data
Data reception (8-bit length)
Reception & shift operation
Receive data 1
<2>
Write
Dummy data
CHAPTER 12 SERIAL ARRAY UNIT
User’s Manual U17893EJ8V0UD
<3>
Receive data 1
Data reception (8-bit length)
Reception & shift operation
Receive data 2
<4> <2>
Read
Write
Dummy data
<3>
Reception & shift operation
<4>
Receive data 2
Data reception (8-bit length)
Receive data 3
Read
<5>
Receive data 3
Read
<6>
<7> <8>
401