UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 482

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

480
SDAr output
SCLr output
register mn
SDAr input
SDAr output
SCLr output
(2) Processing flow
(a) When starting data reception
(b) When receiving last data
register mn
TXEmn,
RXEmn
SOEmn
SDRmn
SDAr input
TSFmn
INTIICr
SEmn
STmn
Shift
TXEmn,
RXEmn
SOEmn
SDRmn
INTIICr
TSFmn
Remark
SSmn
SEmn
STmn
Shift
D2
Output is enabled by serial
communication operation
TXEmn = 1 / RXEmn = 0
“H”
Dummy data (FFH)
D1
m: Unit number (m = 0, 1), n: Channel number (n = 0, 2), r: IIC number (r = 10, 20)
Shift operation
D0
ACK
Receive data
Figure 12-101. Timing Chart of Data Reception
D7
CHAPTER 12 SERIAL ARRAY UNIT
D7
User’s Manual U17893EJ8V0UD
D6
Output is stopped by serial communication operation
D6
TXEmn = 0 / RXEmn = 1
D5
Dummy data (FFH)
D5
TXEmn = 0 / RXEmn = 1
Reception of last byte
Dummy data (FFH)
D4
Shift operation
D4
D3
Shift operation
D3
D2
D1
D2
D0
D1
NACK
IIC operation stop
D0
SOmn bit
manipulation
ACK
Step condition
Receive data
Receive data
CKOmn bit
manipulation
SOmn bit
manipulation