UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 682

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

23.4 Setting of Option Byte
addition to describing to the source. When doing so, the contents set by using the linker option take precedence,
even if descriptions exist in the source, as mentioned below.
010C3H. Describe to 010C0H to 010C3H, therefore, the same values as 000C0H to 000C3H as follows.
680
The user option byte and on-chip debug option byte can be set using the RA78K0R or PM+ linker option, in
See the RA78K0R Assembler Package User’s Manual for how to set the linker option.
A software description example of the option byte setting is shown below.
When the boot swap function is used during self programming, 000C0H to 000C3H is switched to 010C0H to
Caution To specify the option byte by using assembly language, use OPT_BYTE as the relocation attribute
OPT
OPT2
name of the CSEG pseudo instruction. To specify the option byte to 010C0H to 010C3H in order
to use the boot swap function, use the relocation attribute AT to specify an absolute address.
CSEG
DB
DB
CSEG
DB
DB
DB
DB
DB
DB
AT
OPT_BYTE
10H
0FFH
0FFH
85H
010C0H
10H
0FFH
0FFH
85H
; Does not use interval interrupt of watchdog timer,
; Enables watchdog timer operation,
; Window open period of watchdog timer is 25%,
; Overflow time of watchdog timer is 2
; Stops watchdog timer operation during HALT/STOP mode
; Stops LVI default start function
; Reserved area
; Enables on-chip debug operation, does not erase flash memory
; data when security ID authorization fails
; Does not use interval interrupt of watchdog timer,
; Enables watchdog timer operation,
; Window open period of watchdog timer is 25%,
; Overflow time of watchdog timer is 2
; Stops watchdog timer operation during HALT/STOP mode
; Stops LVI default start function
; Reserved area
; Enables on-chip debug operation, does not erase flash memory
; data when security ID authorization fails
CHAPTER 23 OPTION BYTE
User’s Manual U17893EJ8V0UD
10
10
/f
/f
IL
IL
,
,