UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 41

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.2.12 P130 (port 13)
2.2.13 P140 to P145 (port 14)
clock/buzzer output, serial interface data I/O, and clock I/O.
using port input mode register 14 (PIM14).
tolerance) in 1-bit units using port output mode register 14 (POM14).
(1) Port mode
(2) Control mode
P130 functions as a 1-bit output port.
Remark When the device is reset, P130 outputs a low level. Therefore, to output a high level from P130 before
P140 to P145 function as a 6-bit I/O port. These pins also function as timer I/O, external interrupt request input,
Input to the P142 and P143 pins can be specified through a normal input buffer or a TTL input buffer in 1-bit units
Output from the P142 to P144 pins can be specified as normal CMOS output or N-ch open-drain output (V
The following operation modes can be specified in 1-bit units.
(e) XT1, XT2
P140 to P145 function as a 6-bit I/O port. P140 to P145 can be set to input or output port in 1-bit units using port
mode register 14 (PM14). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 14
(PU14).
P140 to P145 function as timer I/O, external interrupt request input, clock/buzzer output, serial interface data I/O,
and clock I/O.
(a) INTP6, INTP7
(b) PCLBUZ0, PCLBUZ1
(c) TI07
(d) TO07
(e) SI20
(f) SO20
These are the pins for connecting a resonator for subsystem clock.
These are the external interrupt request input pins for which the valid edge (rising edge, falling edge, or both
rising and falling edges) can be specified.
These are the clock/buzzer output pins.
This is a pin for inputting an external count clock/capture trigger to 16-bit timer 07.
This is a timer output pin of 16-bit timer 07.
This is a serial data input pin of serial interface CSI20.
This is a serial data output pin of serial interface CSI20.
the device is reset, the output signal of P130 can be used as a pseudo reset signal of the CPU (see the
figure for Remark in 4.2.12 Port 13).
CHAPTER 2 PIN FUNCTIONS
User’s Manual U17893EJ8V0UD
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