UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 397

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
12.5.2 Master reception
Note Use this operation within a range that satisfies the conditions above and the AC characteristics in the electrical
Remark
Target channel
Pins used
Interrupt
Error detection flag
Transfer data length
Transfer rate
Data phase
Clock phase
Data direction
Master reception is that the 78K0R/KF3 outputs a transfer clock and receives data from other device.
3-Wire Serial I/O
specifications (see CHAPTER 28
CHAPTER 29 ELECTRICAL SPECIFICATIONS ((A) GRADE PRODUCTS)).
m: Unit number (m = 0, 1), n: Channel number (n = 0 to 2)
Channel 0 of SAU0
SCK00, SI00
INTCSI00
Transfer end interrupt (in single-transfer mode) or buffer empty interrupt (in continuous transfer mode)
can be selected.
Overrun error detection flag (OVFmn) only
7 or 8 bits
Max. f
Selectable by DAPmn bit
• DAPmn = 0: Data input starts from the start of the operation of the serial clock.
• DAPmn = 1: Data input starts half a clock before the start of the serial clock operation.
Selectable by CKPmn bit
• CKPmn = 0: Forward
• CKPmn = 1: Reverse
MSB or LSB first
CLK
CSI00
/4 [Hz], Min. f
CHAPTER 12 SERIAL ARRAY UNIT
CLK
User’s Manual U17893EJ8V0UD
/(2 × 2
ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS) and
Channel 1 of SAU0
SCK01, SI01
INTCSI01
11
× 128) [Hz]
CSI01
Note
f
CLK
INTCSI10
Channel 2 of SAU0
SCK10, SI10
: System clock frequency
CSI10
Channel 0 of SAU1
SCK20, SI20
INTCSI20
CSI20
395