UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 772

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
<R>
(2) Serial interface: Serial array unit (17/18)
Note
Caution Select the TTL input buffer and the N-ch open drain output (V
Remarks 1.
770
SCLr clock frequency
Hold time when SCLr = “L”
Hold time when SCLr = “H”
Data setup time (reception)
Data hold time (transmission)
(T
(h) During Communication at different potential (2.5 V, 3 V) (simplified I
A
= −40 to +85°C, 2.7 V ≤ V
The value must also be f
3.
ch open drain output (V
2.
4.
(Operation clock to be set by the CKSmn bit of the SMRmn register. m: Unit number (m = 0, 1),
n: Channel number (n = 0, 2), mn = 02, 10)
R
r: IIC number (r = 10, 20), g: PIM, POM number (g = 0, 14)
f
V
communicating at different potentials in simplified I
C
MCK
b
IH
b
[Ω]:Communication line (SDAr, SCLr) pull-up resistance,
[F]: Communication line (SDAr, SCLr) load capacitance, V
4.0 V ≤ V
2.7 V ≤ V
and V
: Serial array unit operation clock frequency
Parameter
CHAPTER 28 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS)
IL
below are observation points for the AC characteristics of the serial array unit when
DD
DD
≤ 5.5 V, 2.7 V ≤ V
≤ 4.0 V, 2.3 V ≤ V
MCK
DD
DD
/4 or less.
= EV
tolerance) mode for SCLr by using the PIMg and POMg registers.
DD
≤ 5.5 V, V
User’s Manual U17893EJ8V0UD
b
b
≤ 4.0 V: V
≤ 2.7 V: V
f
t
t
t
t
SCL
LOW
HIGH
SU:DAT
HD:DAT
Symbol
SS
= EV
IH
IH
4.0 V ≤ V
2.7 V ≤ V
C
2.7 V ≤ V
2.3 V ≤ V
C
4.0 V ≤ V
2.7 V ≤ V
C
2.7 V ≤ V
2.3 V ≤ V
C
4.0 V ≤ V
2.7 V ≤ V
C
2.7 V ≤ V
2.3 V ≤ V
C
4.0 V ≤ V
2.7 V ≤ V
C
2.7 V ≤ V
2.3 V ≤ V
C
4.0 V ≤ V
2.7 V ≤ V
C
2.7 V ≤ V
2.3 V ≤ V
C
= 2.2 V, V
= 2.0 V, V
b
b
b
b
b
b
b
b
b
b
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
= 100 pF, R
SS
= AV
2
Conditions
C mode mode.
DD
b
DD
b
DD
b
DD
b
DD
b
DD
b
DD
b
DD
b
DD
b
DD
b
≤ 4.0 V,
≤ 2.7 V,
≤ 4.0 V,
≤ 2.7 V,
≤ 4.0 V,
≤ 2.7 V,
≤ 4.0 V,
≤ 2.7 V,
≤ 4.0 V,
≤ 2.7 V,
≤ 5.5 V,
≤ 4.0 V,
≤ 5.5 V,
≤ 4.0 V,
≤ 5.5 V,
≤ 4.0 V,
≤ 5.5 V,
≤ 4.0 V,
≤ 5.5 V,
≤ 4.0 V,
SS
IL
IL
= 0.8 V
= 0.5 V
= 0 V)
b
b
b
b
b
b
b
b
b
b
= 1.4 kΩ
= 2.7 kΩ
= 1.4 kΩ
= 2.7 kΩ
= 1.4 kΩ
= 2.7 kΩ
= 1.4 kΩ
= 2.7 kΩ
= 1.4 kΩ
= 2.7 kΩ
b
DD
[V]: Communication line voltage
tolerance) mode for SDAr and the N-
2
C mode)
1/f
1/f
MCK
MCK
MIN.
1065
1065
445
445
0
0
+190
+190
400
400
MAX.
Standard Products
160
160
Note
Note
Unit
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
ns