UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 566

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UPD78F1152AGC-GAD-AX

Manufacturer Part Number
UPD78F1152AGC-GAD-AX
Description
MCU 16BIT 78K0R/KX3 80-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1152AGC-GAD-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1152AGC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
564
(1) Start condition ~ address
Notes 1. To cancel a master wait state, write “FFH” to IIC0 or set WREL0.
WREL0
INTIIC0
WREL0
INTIIC0
ACKD0
MSTS0
ACKD0
MSTS0
ACKE0
ACKE0
Processing by master device
WTIM0
WTIM0
Transfer lines
Processing by slave device
SPD0
TRC0
SDA0
SPD0
TRC0
STD0
SPT0
SCL0
STD0
SPT0
STT0
STT0
IIC0
IIC0
2. Write data to IIC0, not setting WREL0, in order to cancel a wait state during slave transmission.
(When 8-Clock Wait Is Selected for Master, 9-Clock Wait Is Selected for Slave) (1/3)
H
H
H
L
L
L
L
L
L
IIC0
AD6 AD5 AD4 AD3 AD2 AD1 AD0
Figure 13-29. Example of Slave to Master Communication
1
Receiving
address
2
Transmitting
3
CHAPTER 13 SERIAL INTERFACE IIC0
4
User’s Manual U17893EJ8V0UD
5
6
7
R
8
ACK
9
IIC0
IIC0
Receiving
D7
Note 1
1
data Note 2
Transmitting
FFH Note 1
D6
2
D5
3
D4
4
D3
5
D2
6

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