UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 879

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Electrical
specifications
(standard
products)
Electrical
specifications
((A) grade
products)
Function
During
communication
at different
potential (2.5 V,
3 V) (CSI mode)
(master mode,
SCKp... internal
clock output)
During
communication
at different
potential (2.5 V,
3 V) (CSI mode)
(slave mode,
SCKp... external
clock input)
During
communication
at different
potential (2.5 V,
3 V) (simplified
I
Absolute
maximum ratings
X1 oscillator
characteristics
2
C mode)
Details of
Function
−
Select the TTL input buffer for SIp and the N-ch open-drain output (V
mode for SOp and SCKp by using the PIMg and POMg registers.
Select the TTL input buffer for SIp and SCKp and the N-ch open-drain output (V
tolerance) mode for SOp by using the PIMg and POMg registers.
Select the TTL input buffer and the N-ch open-drain output (V
SDAr and the N-ch open-drain output (V
PIMg and POMg registers.
The 78K0R/KF3 has an on-chip debug function, which is provided for development
and evaluation. Do not use the on-chip debug function in products designated for
mass production, because the guaranteed number of rewritable times of the flash
memory may be exceeded when this function is used, and product reliability
therefore cannot be guaranteed.
occurring when the on-chip debug function is used.
Product quality may suffer if the absolute maximum rating is exceeded even
momentarily for any parameter. That is, the absolute maximum ratings are rated
values at which the product is on the verge of suffering physical damage, and
therefore the product must be used under conditions that ensure that the absolute
maximum ratings are not exceeded.
When using the X1 oscillator, wire as follows in the area enclosed by the broken
lines in the above figures to avoid an adverse effect from wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines.
• Do not route the wiring near a signal line through which a high fluctuating current
• Always make the ground point of the oscillator capacitor the same potential as V
• Do not ground the capacitor to a ground pattern through which a high current flows.
• Do not fetch signals from the oscillator.
Since the CPU is started by the internal high-speed oscillation clock after a reset
release, check the X1 clock oscillation stabilization time using the oscillation
stabilization time counter status register (OSTC) by the user.
oscillation stabilization time of the OSTC register and oscillation stabilization time
select register (OSTS) after sufficiently evaluating the oscillation stabilization time
with the resonator to be used.
flows.
APPENDIX B LIST OF CAUTIONS
User’s Manual U17893EJ8V0UD
Cautions
NEC Electronics is not liable for problems
DD
tolerance) mode for SCLr by using the
DD
tolerance) mode for
Determine the
DD
tolerance)
SS
DD
.
769
782
pp.764
to 766
pp.768,
pp.770,
771
p.781
pp.781,
p.783
p.783
(32/34)
877
Page