UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 703

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UPD78F1152AGC-GAD-AX

Manufacturer Part Number
UPD78F1152AGC-GAD-AX
Description
MCU 16BIT 78K0R/KX3 80-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1152AGC-GAD-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1152AGC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Programming Function User’s Manual (U18371E).
Boot cruster 1
Boot cruster 0
Notes 1. Address differs depending on products as follows.
For details of the way to secure of the memory space, refer to the QB-MINI2 On-Chip Debug Emulator with
2. In debugging, reset vector is rewritten to address allocated to a monitor program.
3. Since this area is allocated immediately before the stack area, the address of this area varies depending
on the stack increase and decrease. That is, 6 extra bytes are consumed for the stack area used.
μ
μ
μ
μ
μ
0 2 0 0 0 H
0 1 0 D 8 H
0 1 0 C E H
0 1 0 C 4 H
0 1 0 C 3 H
0 1 0 0 2 H
0 1 0 0 0 H
0 0 0 D 8 H
0 0 0 C E H
0 0 0 C 4 H
0 0 0 C 3 H
0 0 0 0 2 H
0 0 0 0 0 H
PD78F1152, 78F1152A
PD78F1153, 78F1153A
PD78F1154, 78F1154A
PD78F1155, 78F1155A
PD78F1156, 78F1156A
Note 1
Figure 25-2. Memory Spaces Where Debug Monitor Programs Are Allocated
Products
Debug monitor area
Debug monitor area
Debug monitor area
Debug monitor area
Security ID area
Security ID area
Internal ROM
(10 bytes)
(10 bytes)
(10 bytes)
(10 bytes)
(2 bytes)
(2 bytes)
Note 2
Note 2
(1 KB)
CHAPTER 25 ON-CHIP DEBUG FUNCTION
64 KB
96 KB
128 KB
192 KB
256 KB
Internal ROM
User’s Manual U17893EJ8V0UD
Internal ROM
area
On-chip debug option byte area
On-chip debug option byte area
0FC00H-0FFFFH
17C00H-17FFFH
1FC00H-1FFFFH
2FC00H-2FFFFH
3FC00H-3FFFFH
(1 byte)
(1 byte)
Address
Stack area for debugging
: Area used for on-chip debugging
Use prohibited
Internal RAM
(6 bytes)
Note 3
Internal RAM
area
701

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