UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 452

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UPD78F1152AGC-GAD-AX

Manufacturer Part Number
UPD78F1152AGC-GAD-AX
Description
MCU 16BIT 78K0R/KX3 80-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1152AGC-GAD-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1152AGC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
<R>
450
(1) Register setting
SMRmn
SCRmn
SMRmr
SOEm
SOm
SSm
Caution For the UART reception, be sure to set SMRmr of channel r that is to be paired with channel n.
Remark
(a) Serial output register m (SOm) …The register that not used in this mode.
(b) Serial output enable register m (SOEm) …The register that not used in this mode.
(c) Serial channel start register m (SSm) … Sets only the bits of the target channel is 1.
(d) Serial mode register mn (SMRmn)
(e) Serial mode register mr (SMRmr)
(f) Serial communication operation setting register mn (SCRmn)
CKSmn
Same setting value as CKSmn
TXEmn
CKSmr
0/1
0/1
15
15
15
15
15
15
0
0
0
0
Figure 12-79. Example of Contents of Registers for UART Reception of UART
m: Unit number (m = 0, 1), n: Channel number (n = 1, 3), r: Channel number (r = n − 1),
q: UART number (q = 0 to 3)
×: Bit that cannot be used in this mode (set to the initial value when not used in any mode)
0/1: Set to 0 or 1 depending on the usage of the user
CCSmn
CCSmr
RXEmn
14
14
14
14
14
14
0
0
0
0
0
1
: Setting is fixed in the UART reception mode,
DAPmn
13
13
13
13
13
13
0
0
0
0
0
0
CKPmn
12
12
12
12
12
12
0
0
0
0
0
0
11
11
11
11
11
11
0: Forward (normal) reception
1: Reverse reception
1
0
0
0
0
0
(UART0, UART1, UART2, UART3) (1/2)
CHAPTER 12 SERIAL ARRAY UNIT
CKOm2
EOCmn
10
10
10
10
10
10
×
0
0
0
0
1
User’s Manual U17893EJ8V0UD
CKOm1
PTCmn1
0/1
9
×
0
0
9
0
9
0
9
9
9
CKOm0
STSmn
PTCmn0
STSmr
0/1
8
×
8
1
8
0
8
0
8
0
8
DIRmn
0/1
0
0
0
7
7
0
7
0
7
7
7
SISmn0
SISmr0
0/1
0
0
6
6
0
6
0
6
6
6
0
: Setting disabled (set to the initial value)
SLCmn1
1
1
5
0
0
0
5
5
0
5
5
5
SLCmn0
4
0
0
0
4
0
4
0
1
4
4
4
Interrupt sources of channel n
0: Transfer end interrupt
Interrupt sources of channel r
0: Transfer end interrupt
1: Buffer empty interrupt
SSm3
0/1
3
1
3
0
3
0
3
0
3
3
0
SOEm2
MDmn2
DLSmn2
MDmr2
SOm2
SSm2
×
2
0
2
0
2
2
×
2
×
2
1
SOEm1
MDmn1
MDmr1
DLSmn1
SOm1
SSm1
0/1
0/1
×
1
1
1
×
1
1
1
1
1
MDmn0
SOEm0
MDmr0
DLSmn0
SOm0
SSm0
0/1
0/1
0
×
×
×
0
0
0
0
0
0

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