UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 883

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Remark “Classification” in the above table classifies revisions as follows.
CHAPTER 6 TIMER ARRAY UNIT (continuation)
p.211
p.212
p.218
CHAPTER 7 REAL-TIME COUNTER
p.273
p.275
p.277
p.282
p.282
p.287
p.289
p.290
p.295
p.295
p.295
CHAPTER 9 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
p.311
p.311
CHAPTER 10 A/D CONVERTER
p.316
p.316
p.339
p.343
CHAPTER 11 D/A CONVERTER
p.351
p.351
CHAPTER 12 SERIAL ARRAY UNIT
p.364
p.366
p.368
p.378
p.395
p.396
Page
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
Change of Figure 6-13. Start Timing (In One-count Mode)
Change of Figure 6-14. Start Timing (In Capture & One-count Mode)
Change of description of ISC1 and ISC0 bits in Figure 6-21. Format of Input Switch Control
Register (ISC)
Change of Table 7-1. Configuration of Real-Time Counter
Change of 7.3 Registers Controlling Real-Time Counter
Change of description of AMPM bit in Figure 7-3. Format of Real-Time Counter Control
Register 0 (RTCC0)
Change of description of (7) Minute count register (MIN)
Change of description of (8) Hour count register (HOUR)
Addition of description of DEV bit to Figure 7-14. Format of Watch Error Correction Register
(SUBCUD)
Addition of 7.3 (17) Port mode register 1, 3 (PM1, PM3)
Change of Figure 7-19. Procedure for Starting Operation of Real-Time Counter and addition of
Note
Addition of Caution to 7.4.5 1 Hz output of real-time counter
Change of 7.4.6 32.768 kHz output of real-time counter
Change of 7.4.7 512 Hz, 16.384 kHz output of real-time counter
Change of Remark in 9.4.1 Operation as output pin
Change of Figure 9-4. Remote Control Output Application Example
Change of Table 10-2. Settings of ADCS and ADCE
Change of Figure 10-5. Timing Chart When A/D voltage Comparator Is Used
Change of 10.7 Cautions for A/D Converter (2) Reducing current when A/D converter is
stopped
Addition of 10.7 (13) Starting the A/D converter
Change of 11.4.3 Cautions (1)
Change of 11.4.3 Cautions (7)
Change of MDmn0 bit in Figure 12-6. Format of Serial Mode Register mn (SMRmn) (2/2)
Addition of Note to Figure 12-7. Format of Serial Communication Operation Setting Register
mn (SCRmn) (2/3)
Addition of Caution to Figure 12-8. Format of Serial Data Register mn (SDRmn)
Change of description of Figure 12-17. Format of Input Switch Control Register (ISC)
Change of interrupt in 12.5.2 Master reception
Change of Figure 12-32. Example of Contents of Registers for Master Reception of 3-Wire
Serial I/O (CSI00, CSI01, CSI10, CSI20)
APPENDIX C REVISION HISTORY
User’s Manual U17893EJ8V0UD
Description
Classification
(a)
(a)
(a)
(a)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
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(2/5)
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