UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 424

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UPD78F1152AGC-GAD-AX

Manufacturer Part Number
UPD78F1152AGC-GAD-AX
Description
MCU 16BIT 78K0R/KX3 80-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1152AGC-GAD-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1152AGC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
422
(2) Operation procedure
Caution
After setting the PER0 register to 1, be sure to set the SPSm register after 4 or more clocks
have elapsed.
Setting SMRmn register
Stopping communication
Setting SCRmn register
Setting SDRmn register
Starting communication
Writing to SSm register
Starting initial settings
Setting SPSm register
Setting PER0 register
Starting setting to stop
Setting STm register
Figure 12-57. Initial Setting Procedure for Slave Reception
Setting port
Figure 12-58. Procedure for Stopping Slave Reception
CHAPTER 12 SERIAL ARRAY UNIT
User’s Manual U17893EJ8V0UD
Release the serial array unit from the
reset status and start clock supply.
Set the operation clock.
Set an operation mode, etc.
Set a communication format.
Set bits 15 to 9 to 0000000B for baud
rate setting.
Enable data input and clock input of the
target channel by setting a port register
and a port mode register.
Set the SSmn bit of the target channel to
1 to set SEmn = 1.
Wait for a clock from the master.
Write 1 to the STmn bit of the target
channel.
Stop communication in midway.

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