UPD78F1152AGC-GAD-AX Renesas Electronics America, UPD78F1152AGC-GAD-AX Datasheet - Page 897

• Manufacturer Part Number: UPD78F1152AGC-GAD-AX
• Description: MCU 16BIT 78K0R/KX3 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1152AGC-GAD-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4th edition
5th edition
Edition
Change of Note 4 in Figure 21-2 Format of Low-Voltage Detection Register
(LVIM) and addition of Caution 3
Change of Caution 2 in Figure 21-3 Format of Low-Voltage Detection Level
Select Register (LVIS)
Change of <5> in 21.4.1 (1) (a)
Change of Note 2 in Figure 21-5 Timing of Low-Voltage Detector Internal Reset
Signal Generation (Bit: LVISEL = 0, Option Byte: LVIOFF = 1)
Change of description and Caution in 21.4.1 (1) (b)
Change of Figure 21-6 Timing of Low-Voltage Detector Internal Reset Signal
Generation (Bit: LVISEL = 0, Option Byte: LVIOFF = 0) and Note
Change of <4> in 21.4.1 (2)
Change of Note 2 in Figure 21-7 Timing of Low-Voltage Detector Internal Reset
Signal Generation (Bit: LVISEL = 1)
Change of <5> in 21.4.2 (1)
Additions of Note 3 to Figure 21-8 Timing of Low-Voltage Detector Interrupt
Signal Generation (Bit: LVISEL = 0, Option Byte: LVIOFF = 1)
Change of description and Caution in 21.4.2 (1) (b)
Change of Figure 21-9 Timing of Low-Voltage Detector Interrupt Signal
Generation (Bit: LVISEL = 0, Option Byte: LVIOFF = 0) and addition of Note
Change of <4> in 21.4.2 (2)
Addition of Note 3 to Figure 21-10 Timing of Low-Voltage Detector Interrupt
Signal Generation (Bit: LVISEL = 1)
Change of Figure 21-11 Example of Software Processing After Reset Release
Change of 22.1 Regulator Overview
Addition of Note 3 to Figure 22-1 Format of Regulator Mode Control Register
(RMC)
Change of description in 23.1.1 (2) 000C1H/010C1H
Change of Figure 23-2 Format of User Option Byte (000C1H/010C1H) and
Caution 2
Change of description in 24.4.5 REGC pin
Addition of Caution 4 to 24.8 Flash Memory Programming by Self-Programming
Addition of 25.3 Securing of user resources
Modification of throughout
Change of status of
under development to mass production
Change of corresponding pins of EV
Supplies
Change of description in 2.2.21 FLMD0
Modification of 37-A to 37-B and 39 to 2-W in Table 2-2. Connection of Unused
Pins
Modification of 37-A to 37-B and 39 to 2-W in Figure 2-1. Pin I/O Circuit List
μ
PD78F1152, 78F1153, 78F1154, 78F1155, and 78F1156 from
APPENDIX C REVISION HISTORY
User’s Manual U17893EJ8V0UD
DD
Description
and V
DD
in Table 2-1. Pin I/O Buffer Power
CHAPTER 21 LOW-
VOLTAGE DETECTOR
CHAPTER 22
REGULATOR
CHAPTER 23 OPTION
BYTE
CHAPTER 24 FLASH
MEMORY
CHAPTER 25 ON-CHIP
DEBUGGING
CHAPTER 28
ELECTRICAL
SPECIFICATIONS
(TARGET)
Throughout
CHAPTER 2 PIN
FUNCTIONS
Chapter
(11/20)
895