r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 1029

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

24.6
24.6.1
This LSI shifts from a program execution state to deep software standby mode by executing the
SLEEP instruction when the STBY bit in STBCR1 is 1 and the STBYMD bit in STBCR6 is 0.
However, deep software standby mode cannot be entered when the bus is released (low-level input
to BREQ pin). Execute the SLEEP instruction after halting the DTC. In deep software standby
mode, not only the CPU but also the clock and on-chip peripheral modules halt. Furthermore, the
internal power supply of this LSI is turned off.
The contents of the CPU registers and the data of the on-chip RAM become undefined. The
registers of on-chip peripheral modules are initialized. For details on the pin states in deep
software standby mode, refer to appendix A, Pin States.
The procedure for a transition to deep software standby mode is as follows:
1. Clear the TME bit in the timer control register (WTCSR) of the WDT to 0 to stop the WDT.
2. If the DTC is operating, stop its operation.
3. If the bus is released (low-level input to BREQ pin), acquire the bus mastership (high-level
4. After setting the STBY bit in STBCR1 to 1 and clearing the STBYMD bit in STBCR6 to 0,
5. Deep software standby mode is entered, the clocks within this LSI are halted, and the internal
24.6.2
Deep software standby mode is canceled by a power-on reset with the RES pin. Keep the RES pin
low until the clock oscillation settles.
input to BREQ pin).
execute the SLEEP instruction.
power supply of this LSI is turned off.
Deep Software Standby Mode
Transition to Deep Software Standby Mode
Canceling Deep Software Standby Mode
Rev. 1.00 Sep. 21, 2007 Page 1003 of 1124
Section 24 Power-Down Modes
REJ09B0402-0100