r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 244

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Section 9 Bus State Controller (BSC)
Rev. 1.00 Sep. 21, 2007 Page 218 of 1124
REJ09B0402-0100
Bit
11
10
Bit Name
DTBST
DTSA
Initial
Value
0
0
R/W
R/W
R/W
Description
DTC Burst Enable
Selects whether or not the DTC retains the bus
mastership and remains continuously active until all
transfer operations are complete when multiple DTC
activation requests have been generated.
0: Release the bus on the completion of transfer for each
1: Keep the DTC continuously active, i.e. only release
Notes: When this bit is set to 1, the following restrictions
DTC Short Address Mode
In this mode, the information that specifies a DTC
transfer takes up only 3 longwords.
0: Transfer information is read out as 4 longwords. The
1: Transfer information is read out as 3 longwords. The
Note: Transfer in short address mode is only available
individual DTC activation source.
the bus on completion of processing for all DTC
activation sources.
transfer information is arranged as shown in figure 8.2
(normal address mode).
transfer information is arranged as shown in figure 8.2
(short address mode).
between on-chip peripheral modules and on-chip
RAM, because the higher-order 8 bits of the SAR
and DAR are considered to be all 1.
apply.
1. Clock setting with the frequency control register
2. The vector information must be in on-chip ROM
3. The transfer information must be in on-chip
4. Transfer must be between the on-chip RAM
(FRQCR) must be Iφ: Bφ: Pφ: MIφ: MPφ: = 8: 4:
4: 4: 4, 4: 2: 2: 2: 2, or 2: 1: 1: 1: 1
or on-chip RAM.
RAM.
and an on-chip peripheral module or between
external memory and an on-chip peripheral
module.