r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 774

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Section 19 Controller Area Network (RCAN-ET)
TSEG2:
The RCAN-ET Bit Rate Calculation is:
where BRP is given by the register value and TSEG1 and TSEG2 are derived values from TSG1
and TSG2 register values. The ‘+ 1’ in the above formula is for the Sync-Seg which duration is 1
time quanta.
BCR Setting Constraints
These constraints allow the setting range shown in the table below for TSEG1 and TSEG2 in the
Bit Configuration Register. The number in the table shows possible setting of SJW. "No" shows
that there is no allowed combination of TSEG1 and TSEG2.
Rev. 1.00 Sep. 21, 2007 Page 748 of 1124
REJ09B0402-0100
Bit Rate =
f
TSEG1min > TSEG2 ≥ SJWmax
8 ≤ TSEG1 + TSEG2 + 1 ≤ 25 time quanta (TSEG1 + TSEG2 + 1 = 7 is not allowed)
TSEG2 ≥ 2
CLK
= Peripheral Clock
TSG2 + 1
2 * (BRP + 1) * (TSEG1 + TSEG2 + 1)
f
clk
(SJW = 1 to 4)