r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 787

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Bit 0 — This bit is always ‘0’ as this is a receive-only mailbox. Writing a '1' to this bit position
has no effect and always read back as a ‘0’.
(3)
The TXACK0 is a 16-bit read / conditionally-write registers. This register is used to signal to the
CPU that a mailbox transmission has been successfully made. When a transmission has succeeded
the RCAN-ET sets the corresponding bit in the TXACK register. The CPU may clear a TXACK
bit by writing a '1' to the corresponding bit location. Writing a '0' has no effect.
• TXACK0
Initial value:
Note : * Only when writing a ‘1’ to clear.
Bit 15 to 1 — notifies that the requested transmission of the corresponding Mailbox has been
finished successfully. The bit 15 to 1 corresponds to Mailbox-15 to 1 respectively.
Bit 0 — This bit is always ‘0’ as this is a receive-only mailbox. Writing a '1' to this bit position
has no effect and always read back as a ‘0’.
Bit[15:1]:TXCR0
0
1
Bit[15:1]:TXACK0
0
1
R/W:
Transmit Acknowledge Register (TXACK0)
Bit:
R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W*
15
0
14
0
13
Description
Transmit message cancellation idle state in corresponding mailbox (Initial
value)
[Clearing Condition] Completion of transmit message cancellation
(automatically cleared)
Transmission cancellation request made for corresponding mailbox
Description
[Clearing Condition] Writing ‘1’ (Initial value)
Corresponding Mailbox has successfully transmitted message (Data or
Remote Frame)
[Setting Condition] Completion of message transmission for corresponding
mailbox
0
12
0
11
0
10
0
9
0
TXACK0[15:1]
8
0
Section 19 Controller Area Network (RCAN-ET)
7
0
Rev. 1.00 Sep. 21, 2007 Page 761 of 1124
6
0
5
0
4
0
3
0
REJ09B0402-0100
2
0
1
0
0
0
0
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