r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 604

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 14 Serial Communication Interface (SCI)
Figure 14.9 shows a sample flowchart for initializing the SCI.
Rev. 1.00 Sep. 21, 2007 Page 578 of 1124
REJ09B0402-0100
Note: * In simultaneous transmit and receive operations, the TE and RE bits should both be cleared to
Set the PFC for the external pins to be
Set the RIE, TIE, TEIE, and MPIE bits
Set CKE1 and CKE0 bits in SCSCR
Set TE and RE bits of SCSCR to 1
TE and RE bits in SCSCR to 0*
Clear RIE, TIE, TEIE, MPIE,
Set data transfer format in
used (SCK, TXD, RXD)
0 or set to 1 simultaneously.
(TE and RE bits are 0)
1-bit interval elapsed?
Set value in SCBRR
Start initialization
<Transfer starts>
in SCSCR
SCSMR
Figure 14.9 Sample Flowchart for SCI Initialization
Yes
Wait
No
[4]
[5]
[2]
[3]
[1]
[1]
[2]
[3]
[4]
[5]
Set the clock selection in SCSCR.
Set the data transfer format in SCSMR.
Write a value corresponding to the bit rate to
SCBRR. Not necessary if an external clock is
used.
Set PFC of the external pin used. Set RXD
input during receiving and TXD output during
transmitting. Set SCK input/output according
to contents set by CKE1 and CKE0.
Set the TE bit or RE bit in SCR to 1.* Also
make settings of the RIE, TIE, TEIE, and
MPIE bits. At this time, the TXD, RXD, and
SCK pins are ready to be used. The TXD pin
is in a mark state during transmitting. When
synchronous clock output (clock master) is
set during receiving in clock synchronous
mode, outputting clocks from the SCK pin
starts.

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