r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 631

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

15.3.2
SSCRL selects operating mode, software reset, and transmit/receive data length.
Bit
7
6
5
4 to 2
Bit Name
FCLRM
SSUMS
SRES

SS Control Register L (SSCRL)
Initial value:
Initial
Value
0
0
0
All 0
R/W:
Bit:
FCLRM SSUMS SRES
R/W
R/W
R/W
R/W
R/W
R
7
0
R/W
6
0
Description
Flag Clear Mode
Selects whether the SSRXI and SSTXI interrupt flags
are cleared on writing to SSTDR or reading from
SSRDR or on completion of DTC transfer. When using
the DTC, set this bit to 0.
0: Flags are cleared when DTC transfer is completed
1: Flags are cleared when the register is accessed
Selects transfer mode from SSU mode and clock
synchronous mode.
0: SSU mode
1: Clock synchronous mode
Software Reset
Setting this bit to 1 forcibly resets the SSU internal
sequencer. After that, this bit is automatically cleared.
The ORER, TEND, TDRE, RDRF, and CE bits in SSSR
and the TE and RE bits in SSER are also initialized.
Values of other bits for SSU registers are held.
To stop transfer, set this bit to 1 to reset the SSU
internal sequencer.
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W
5
0
Section 15 Synchronous Serial Communication Unit (SSU)
R
4
0
-
R
3
0
-
Rev. 1.00 Sep. 21, 2007 Page 605 of 1124
R
2
0
-
R/W
1
0
DATS[1:0]
R/W
0
0
REJ09B0402-0100