r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 207

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

8.5.2
By specifying bit SM1 in MRA and bit DM1 in MRB to the fixed address mode, a part of transfer
information will not be written back. Table 8.5 shows the transfer information writeback skip
condition and writeback skipped registers. Note that the CRA and CRB are always written back.
The writeback of the MRA and MRB are always skipped.
Table 8.5
8.5.3
In normal transfer mode, data are transferred in one byte, one word, or one longword units in
response to a single activation request. From 1 to 65,536 transfers can be specified. The transfer
source and destination addresses can be specified as incremented, decremented, or fixed. When the
specified number of transfers ends, an interrupt can be requested to the CPU.
Table 8.6 lists the register function in normal transfer mode. Figure 8.6 shows the memory map in
normal transfer mode.
Table 8.6
Note:
SM1
0
0
1
1
Register
SAR
DAR
CRA
CRB
*
Transfer Information Writeback Skip Function
Normal Transfer Mode
Transfer information writeback is skipped.
Transfer Information Writeback Skip Condition and Writeback Skipped
Registers
Register Function in Normal Transfer Mode
Function
Source address
Destination address
Transfer count A
Transfer count B
DM1
0
1
0
1
SAR
Skipped
Skipped
Written back
Written back
Written Back Value
Not updated
Incremented/decremented/fixed*
Incremented/decremented/fixed*
CRA − 1
Rev. 1.00 Sep. 21, 2007 Page 181 of 1124
Section 8 Data Transfer Controller (DTC)
DAR
Skipped
Written back
Skipped
Written back
REJ09B0402-0100