r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 481
r5f71374an80fpv
Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F71374AN80FPV.pdf
(1154 pages)
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Pin initialization procedures are described below for the numbered combinations in table 10.59.
The active level is assumed to be low.
Operation when Error Occurs during Normal Mode Operation, and Operation is Restarted
in Normal Mode: Figure 10.136 shows an explanatory diagram of the case where an error occurs
in normal mode and operation is restarted in normal mode after re-setting.
MTU2 module output
1. After a reset, MTU2 output is low and ports are in the high-impedance state.
2. After a reset, the TMDR setting is for normal mode.
3. For channels 3 and 4, enable output with TOER before initializing the pins with TIOR.
4. Initialize the pins with TIOR. (The example shows initial high output, with low output on
5. Set MTU2 output with the PFC.
6. The count operation is started by TSTR.
7. Output goes low on compare-match occurrence.
8. An error occurs.
9. Set port output with the PFC and output the inverse of the active level.
10. The count operation is stopped by TSTR.
11. Not necessary when restarting in normal mode.
12. Initialize the pins with TIOR.
13. Set MTU2 output with the PFC.
14. Operation is restarted by TSTR.
compare-match occurrence.)
Figure 10.136 Error Occurrence in Normal Mode, Recovery in Normal Mode
Port output
n = 0 to 15
TIOC*A
TIOC*B
PEn
PEn
RESET
1
(normal)
TMDR
2
High-Z
High-Z
TOER
(1)
3
0 out)
TIOR
(1 init
4
(MTU2)
PFC
5
TSTR
(1)
6
Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Match
7
occurs
Error
8
Rev. 1.00 Sep. 21, 2007 Page 455 of 1124
(PORT)
PFC
9
TSTR
10
(0)
(normal)
TMDR
11
0 out)
TIOR
(1 init
12
REJ09B0402-0100
(MTU2)
PFC
13
TSTR
(1)
14
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