r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 155

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

7.3.5
BDMRA is a 32-bit readable/writable register. BDMRA specifies bits masked in the break data
specified by BDRA.
Notes: 1. Specify an operand size when including the value of the data bus in the break condition.
Initial value:
Initial value:
Bit
31 to 0 BDMA31 to
R/W:
R/W:
Bit:
Bit:
2. When the byte size is selected as a break condition, the same byte data must be set in
BDMA31 BDMA30 BDMA29 BDMA28 BDMA27 BDMA26 BDMA25 BDMA24 BDMA23 BDMA22 BDMA21 BDMA20 BDMA19 BDMA18 BDMA17 BDMA16
BDMA15 BDMA14 BDMA13 BDMA12 BDMA11 BDMA10 BDMA9
Bit Name
BDMA 0
R/W
R/W
Break Data Mask Register A (BDMRA)
31
15
0
0
bits 15 to 8 and 7 to 0 in BDMRA as the break mask data in BDRA.
R/W
R/W
30
14
0
0
R/W
R/W
29
13
0
0
Initial
Value
All 0
R/W
R/W
28
12
0
0
R/W
R/W
27
11
R/W
R/W
0
0
R/W
R/W
26
10
0
0
Description
Break Data Mask A
Specifies bits masked in the break data of channel A
specified by BDRA (BDA31 to BDA0).
0: Break data BDAn of channel A is included in the
1: Break data BDAn of channel A is masked and is not
Note: n = 31 to 0
R/W
R/W
25
0
9
0
break condition
included in the break condition
BDMA8
R/W
R/W
24
0
8
0
BDMA7
R/W
R/W
23
0
7
0
BDMA6
Rev. 1.00 Sep. 21, 2007 Page 129 of 1124
R/W
R/W
22
0
6
0
Section 7 User Break Controller (UBC)
BDMA5
R/W
R/W
21
0
5
0
BDMA4
R/W
R/W
20
0
4
0
BDMA3
R/W
R/W
19
0
3
0
REJ09B0402-0100
BDMA2
R/W
R/W
18
0
2
0
BDMA1
R/W
R/W
17
0
1
0
BDMA0
R/W
R/W
16
0
0
0