r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 806

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Section 19 Controller Area Network (RCAN-ET)
19.5
Table 19.2 lists the RCAN-ET interrupt sources. With the exception of the reset processing
interrupt (IRR0) by a power-on reset, these sources can be masked. Masking is implemented using
the mailbox interrupt mask register 0 (MBIMR0) and interrupt mask register (IMR). For details on
the interrupt vector of each interrupt source, see section 6, Interrupt Controller (INTC).
Table 19.2 RCAN-ET Interrupt Sources
Notes: 1. Available only in Test Mode.
Rev. 1.00 Sep. 21, 2007 Page 780 of 1124
REJ09B0402-0100
Module
RCAN-ET_0
2. RM0_0 is an interrupt generated by the remote request pending flag for mailbox 0
3. IRR1 is a data frame received interrupt flag for mailboxes 0 to 15, and IRR2 is a remote
4. The DTC can be activated only by the RM0_0 interrupt.
Interrupt Sources
(RFPR0[0]) or the data frame receive flag for mailbox 0 (RXPR0[0]). RM1_0 is an
interrupt generated by the remote request pending flag for mailbox n (RFPR0[n]) or the
data frame receive flag for mailbox n (RXPR0[n]) (n = 1 to 15).
frame request interrupt flag for mailboxes 0 to 15.
Interrupt Description
ERS_0
OVR_0
RM0_0*
RM1_0*
SLE_0
2
2
Error Passive Mode (TEC ≥ 128 or REC ≥
128)
Bus Off (TEC ≥ 256)/Bus Off recovery
Error warning (TEC ≥ 96)
Error warning (REC ≥ 96)
Message error detection
Reset/halt/CAN sleep transition
Overload frame transmission
Unread message overwrite (overrun)
Detection of CAN bus operation in CAN
sleep mode
Data frame reception
Remote frame reception
Message transmission/transmission
disabled (slot empty)
Interrupt
Flag
IRR5
IRR6
IRR3
IRR4
IRR13*
IRR0
IRR7
IRR9
IRR12
IRR1*
IRR2*
IRR8
3
3
1
DTC
Activation
Not possible
Possible*
Not possible
4