r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 608

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Section 14 Serial Communication Interface (SCI)
In receiving, the SCI operates as follows:
1. The SCI synchronizes with serial clock input or output and initializes internally.
2. Receive data is shifted into SCRSR in order from the LSB to the MSB. After receiving the
3. After setting RDRF to 1, if the receive-data-full interrupt enable bit (RIE) is set to 1 in
Rev. 1.00 Sep. 21, 2007 Page 582 of 1124
REJ09B0402-0100
data, the SCI checks whether the RDRF flag is 0 and the receive data can be transferred from
SCRSR to SCRDR. If this check is passed, the SCI sets the RDRF flag to 1 and stores the
received data in SCRDR. If a receive error is detected, the SCI operates as shown in table
14.16. In this state, subsequent reception cannot be continued. In addition, the RDRF flag will
not be set to 1 after reception; be sure to clear the RDRF flag to 0.
SCSCR, the SCI requests a receive-data-full interrupt (RXI). If the ORER bit is set to 1 and the
RIE bit in SCSCR is also set to 1, the SCI requests a receive error interrupt (ERI).
Figure 14.12 Sample Flowchart for Receiving Serial Data (2)
No
Clear ORER flag in SCSSR to 0
Overrun error handling
Error handling
ORER = 1?
End
Yes