r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 159

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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7.3.9
BDMRB is a 32-bit readable/writable register. BDMRB specifies bits masked in the break data
specified by BDRB.
Notes: 1. Specify an operand size when including the value of the data bus in the break condition.
Initial value:
Initial value:
Bit
31 to 0 BDMB31 to
R/W:
R/W:
Bit:
Bit:
2. When the byte size is selected as a break condition, the same byte data must be set in
BDMB31 BDMB30 BDMB29 BDMB28 BDMB27 BDMB26 BDMB25 BDMB24 BDMB23 BDMB22 BDMB21 BDMB20 BDMB19 BDMB18 BDMB17 BDMB16
BDMB15 BDMB14 BDMB13 BDMB12 BDMB11 BDMB10 BDMB9
Bit Name
BDMB 0
R/W
R/W
Break Data Mask Register B (BDMRB)
31
15
0
0
bits 15 to 8 and 7 to 0 in BDMRB as the break mask data in BDRB.
R/W
R/W
30
14
0
0
R/W
R/W
29
13
0
0
Initial
Value
All 0
R/W
R/W
28
12
0
0
R/W
R/W
27
11
R/W
R/W
0
0
R/W
R/W
26
10
0
0
Description
Break Data Mask B
Specifies bits masked in the break data of channel B
specified by BDRB (BDB31 to BDB0).
0: Break data BDBn of channel B is included in the
1: Break data BDBn of channel B is masked and is not
Note: n = 31 to 0
R/W
R/W
25
0
9
0
break condition
included in the break condition
BDMB8
R/W
R/W
24
0
8
0
BDMB7
R/W
R/W
23
0
7
0
BDMB6
Rev. 1.00 Sep. 21, 2007 Page 133 of 1124
R/W
R/W
22
0
6
0
Section 7 User Break Controller (UBC)
BDMB5
R/W
R/W
21
0
5
0
BDMB4
R/W
R/W
20
0
4
0
BDMB3
R/W
R/W
19
0
3
0
REJ09B0402-0100
BDMB2
R/W
R/W
18
0
2
0
BDMB1
R/W
R/W
17
0
1
0
BDMB0
R/W
R/W
16
0
0
0

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