r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 946

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 22 Flash Memory
(2) State Transition Diagram
Rev. 1.00 Sep. 21, 2007 Page 920 of 1124
REJ09B0402-0100
Figure 22.8 gives an overview of the state transitions after the chip has been started up in boot
mode. For details on boot mode, see section 22.9.1, Specifications of the Standard Serial
Communications Interface in Boot Mode.
1. Bit-rate matching
2. Waiting for inquiry and selection commands
3. Automatic erasure of the entire user MAT and user boot MAT
4. Waiting for programming/erasure command
 On receiving the programming selection command, the chip waits for data to be
 On receiving the erasure select command, the chip waits for the block number of a block to
 In addition to the programming and erasure commands, commands for sum checking and
Note that the command for reading from the user MAT/user boot MAT can only read data that
has been programmed after automatic erasure of the entire user MAT and user boot MAT.
After the chip has been started up in boot mode, bit-rate matching between the SCI and the
host proceeds.
The chip sends the requested information to the host in response to inquiries regarding the
size and configuration of the user MAT, start addresses of the MATs, information on
supported devices, etc.
After all necessary inquiries and selections have been made and the command for transition
to the programming/erasure state is sent by the host, the entire user MAT and user boot
MAT are automatically erased.
programmed. To program data, the host transmits the programming command code
followed by the address where programming should start and the data to be programmed.
This is repeated as required while the chip is in the programming-selected state. To
terminate programming, H'FFFFFFFF should be transmitted as the first address of the area
for programming. This makes the chip return to the programming/erasure command
waiting state from the programming data waiting state.
be erased. To erase a block, the host transmits the erasure command code followed by the
number of the block to be erased. This is repeated as required while the chip is in the
erasure-selected state. To terminate erasure, H'FF should be transmitted as the block
number. This makes the chip return to the programming/erasure command waiting state
from the erasure block number waiting state. Erasure should only be executed when a
specific block is to be reprogrammed without executing a reset-start of the chip after the
flash memory has been programmed in boot mode. If all desired programming is done in a
single operation, such erasure processing is not necessary because all blocks are erased
before the chip enters the programming/erasure/other command waiting state.
blank checking (checking for erasure) of the user MAT and user boot MAT, reading data
from the user MAT/user boot MAT, and acquiring current state information are provided.

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