r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 52

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Part Number:
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Manufacturer:
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Section 2 CPU
Table 2.7
Note:
2.4.2
Table 2.8 lists addressing modes and effective address calculation methods.
Table 2.8
Rev. 1.00 Sep. 21, 2007 Page 26 of 1124
REJ09B0402-0100
Type
16-bit displacement
Addressing
Mode
Register
direct
Register
indirect
Register
indirect with
post-increment
Register
indirect with
pre-decrement
*
Addressing Modes
Immediate data is referenced by @(disp,PC).
Access with Displacement
Addressing Modes and Effective Addresses
Instruction
Format
Rn
@Rn
@Rn+
@–Rn
CPU in this LSI
MOV.W @(disp,PC),R0
MOV.W @(R0,R1),R2
.DATA.W H'1234
Effective Address Calculation Method
Effective address is register Rn.
(Operand is register Rn contents.)
Effective address is register Rn contents.
Effective address is register Rn contents. A
constant is added to Rn after instruction
execution: 1 for a byte operand, 2 for a word
operand, 4 for a longword operand.
Effective address is register Rn contents,
decremented by a constant beforehand: 1 for a
byte operand, 2 for a word operand, 4 for a
longword operand.
........
1/2/4
1/2/4
Rn
Rn
Rn
Rn + 1/2/4
Rn - 1/2/4
+
-
Rn - 1/2/4
Rn
Rn
Example of Other CPUs
MOV.W @(H'1234,R1),R2
Calculation
Formula
Rn
Rn
After instruction
execution
Byte: Rn + 1 → Rn
Word: Rn + 2 → Rn
Longword: Rn + 4
→ Rn
Byte: Rn – 1 → Rn
Word: Rn – 2 → Rn
Longword: Rn – 4
→ Rn
(Instruction
executed with Rn
after calculation)

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