r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 771

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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The bit configuration registers (BCR0 and BCR1) are 2 X 16-bit read/write register that are used
to set CAN bit timing parameters and the baud rate pre-scaler for the CAN Interface.
The Time quanta is defined as:
Where: BRP (Baud Rate Pre-scaler) is the value stored in BCR0 incremented by 1 and fclk is the
used peripheral bus frequency.
• BCR1 (Address = H'004)
Initial value:
Please refer to the table on section 0 for TSG1 and TSG2 setting.
Bits 15 to 12 — Time Segment 1 (TSG1[3:0] = BCR1[15:12]): These bits are used to set the
segment TSEG1 (= PRSEG + PHSEG1) to compensate for edges on the CAN Bus with a positive
phase error. A value from 4 to 16 time quanta can be set.
Bit 11 : Reserved. The written value should always be '0' and the returned value is '0'.
Bit 15:
TSG1[3]
0
0
0
0
0
:
:
1
R/W:
Bit Configuration Register (BCR0, BCR1)
Bit:
Timequanta =
R/W
Bit 14:
TSG1[2]
0
0
0
0
1
:
:
1
15
0
R/W
14
TSG1[3:0]
0
Bit 13:
TSG1[1]
0
0
1
1
0
:
:
1
R/W
13
0
2 * BRP
f
clk
R/W
12
0
Bit 12:
TSG1[0] Description
0
1
0
1
0
:
:
1
11
R
0
-
R/W
10
0
Setting prohibited (Initial value)
Setting prohibited
Setting prohibited
PRSEG + PHSEG1 = 4 time quanta
PRSEG + PHSEG1 = 5 time quanta
:
:
PRSEG + PHSEG1 = 16 time quanta
TSG2[2:0]
R/W
9
0
R/W
8
0
Section 19 Controller Area Network (RCAN-ET)
R
7
0
-
Rev. 1.00 Sep. 21, 2007 Page 745 of 1124
R
6
0
-
R/W
5
0
SJW[1:0]
R/W
4
0
R
3
0
-
REJ09B0402-0100
R
2
0
-
R
1
0
-
R/W
BSP
0
0

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