r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 46

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 2 CPU
• Global-base register (GBR)
• Vector-base register (VBR)
Rev. 1.00 Sep. 21, 2007 Page 20 of 1124
REJ09B0402-0100
Bit
1
0
This register indicates a base address in GBR indirect addressing mode. The GBR indirect
addressing mode is used for data transfer of the on-chip peripheral module registers and logic
operations.
This register indicates the base address of the exception handling vector table.
Bit
name
S
T
Default
Undefined
Undefined
Read/
Write
R/W
R/W
Description
Used by the multiply and accumulate instruction.
Indicates true (1) or false (0) in the following
instructions: MOVT, CMP/cond, TAS, TST, BT (BT/S),
BF (BF/S), SETT, CLRT
Indicates carry, borrow, overflow, or underflow in the
following instructions: ADDV, ADDC, SUBV, SUBC,
NEGC, DIV0U, DIV0S, DIV1, SHAR, SHAL, SHLR,
SHLL, ROTR, ROTL, ROTCR, ROTCL
S Bit
T Bit

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