r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 534

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 12 Port Output Enable (POE)
12.3.5
ICSR3 is a 16-bit readable/writable register that selects the POE8 pin input mode, controls the
enable/disable of interrupts, and indicates status.
Initial value:
Rev. 1.00 Sep. 21, 2007 Page 508 of 1124
REJ09B0402-0100
Bit
15 to
13
12
11, 10
Notes:
R/W:
Bit:
1.
2.
Bit Name
POE8F
Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
Can be modified only once after a power-on reset.
Input Level Control/Status Register 3 (ICSR3)
15
R
0
-
14
R
0
-
13
R
0
-
Initial
value
All 0
0
All 0
R/(W)*
POE8F
12
0
1
R/W
R
R/(W)*
R
11
R
0
-
10
R
0
-
1
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
POE8 Flag
This flag indicates that a high impedance request has
been input to the POE8 pin.
[Clearing conditions]
[Setting condition]
Reserved
These bits are always read as 0. The write value should
always be 0.
POE8E
R/W*
9
0
By writing 0 to POE8F after reading POE8F = 1
(when the falling edge is selected by bits 1 and 0 in
ICSR3)
By writing 0 to POE8F after reading POE8F = 1 after
a high level input to POE8 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 1 and 0 in ICSR3)
When the input condition set by bits 1 and 0 in
ICSR3 occurs at the POE8 pin
2
R/W
PIE3
8
0
R
7
0
-
R
6
0
-
R
5
0
-
R
4
0
-
R
3
0
-
R
2
0
-
R/W*
POE8M[1:0]
1
0
2
R/W*
0
0
2

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