r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 617

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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14.5
The SCI has four interrupt sources: transmit end (TEI), receive error (ERI), receive-data-full
(RXI), and transmit-data-empty (TXI) interrupt requests.
Table 14.17 shows the interrupt sources. The interrupt sources are enabled or disabled by means of
the TIE, RIE, and TEIE bits in SCSCR and the EIO bit in SCSPTR. A separate interrupt request is
sent to the interrupt controller for each of these interrupt sources.
When the TDRE flag in the serial status register (SCSSR) is set to 1, a TDR empty interrupt
request is generated. This request can be used to activate the data transfer controller (DTC) to
transfer data. The TDRE flag is automatically cleared to 0 when data is written to the transmit data
register (SCTDR) through the DTC.
When the RDRF flag in SCSSR is set to 1, an RDR full interrupt request is generated. This request
can be used to activate the DTC to transfer data. The RDRF flag is automatically cleared to 0
when data is read from the receive data register (SCRDR) through the DTC.
When the ORER, FER, or PER flag in SCSSR is set to 1, an ERI interrupt request is generated.
This request cannot be used to activate the DTC. When processing the received data through the
DTC and handling the receive error by an interrupt requested to the CPU, set the RIE bit to 1 and
set the EIO bit in SCSPTR to 1 to issue an interrupt to the CPU only when a receive error is
detected. If the EIO bit is cleared to 0, an interrupt is issued to the CPU even when correct data is
received.
When the TEND flag in SCSSR is set to 1, a TEI interrupt request is generated. This request
cannot be used to activate the DTC.
The TXI interrupt indicates that transmit data can be written, and the TEI interrupt indicates that
transmission has been completed.
Table 14.17 SCI Interrupt Sources
Interrupt Source
ERI
RXI
TXI
TEI
SCI Interrupt Sources and DTC
Description
Interrupt caused by receive error (ORER, FER, or
PER)
Interrupt caused by receive data full (RDRF)
Interrupt caused by transmit data empty (TDRE)
Interrupt caused by transmit end (TENT)
Section 14 Serial Communication Interface (SCI)
Rev. 1.00 Sep. 21, 2007 Page 591 of 1124
DTC Activation
Not possible
Possible
Possible
Not possible
REJ09B0402-0100

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