r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 732

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 17 A/D Converter (ADC)
17.4.5
The A/D conversion can be externally triggered. To input an external trigger, set the pin function
controller (PFC) to select ADTRG pin function and drive the ADTRG pin low when a high level
is input to the ADTRG pin with the TRGE and EXTRG bits in ADCR are both set to 1. A falling
edge of the ADTRG pin sets the ADST bit in ADCR to 1, starting the A/D conversion. Other
operations are conducted in the same way for all A/D conversion activation soures. Figure 17.6
shows the timing.
The ADST bit is set to 1 after 5 states has elapsed from the point at which the A/D converter
detects a falling edge on the ADTRG pin. A low level input to the ADTRG pin must be made after
the ADCR, ADSTRGR, and ADANSR registers have been set.
17.4.6
When the A/D data register (ADDR) is read by the CPU or DTC, ADDR can be automatically
cleared to H'0000 by setting the ACE bit in ADCR to 1. This function allows the detection of an
ADDR renewal failure.
Figure 17.7 shows an example of when the auto-clear function of ADDR is disabled (normal state)
and enabled.
Rev. 1.00 Sep. 21, 2007 Page 706 of 1124
REJ09B0402-0100
ADTRG
External trigger
signal
ADST
External Trigger Input Timing
Example of ADDR Auto-Clear Function
Figure 17.6 External Trigger Input Timing
A/D conversion

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