r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 700

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 16 I
16.4.7
The logic levels at the SCL and SDA pins are routed through noise filters before being latched
internally. Figure 16.17 shows a block diagram of the noise filter circuit.
The noise filter consists of three cascaded latches and a match detector. The SCL (or SDA) input
signal is sampled on the peripheral clock. When NF2CYC is set to 0, this signal is not passed
forward to the next circuit unless the outputs of both latches agree. When NF2CYC is set to 1, this
signal is not passed forward to the next circuit unless the outputs of three latches agree. If they do
not agree, the previous value is held.
Rev. 1.00 Sep. 21, 2007 Page 674 of 1124
REJ09B0402-0100
SCL or SDA
input signal
Sampling
clock
Noise Filter
2
C Bus Interface 2 (I
D
Sampling clock
Peripheral clock
Latch
C
cycle
Figure 16.17 Block Diagram of Noise Filter
Q
2
C2)
D
Latch
C
Q
D
Latch
C
NF2CYC
Q
detector
detector
Match
Match
1
0
SCL or SDA
Internal
signal

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