r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 973

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

22.8.3
1. Download time of on-chip program
2. User branch processing intervals
Table 22.11 Initiation Intervals of User Branch Processing
However, when operation is done with CPU clock of 80 MHz, maximum values of the time until
first user branch processing are as shown in table 22.12.
Table 22.12 Initial User Branch Processing Time
3. Write to flash-memory related registers by DTC
4. State in which interrupts are ignored
Processing Name
Programming
Erasing
Processing Name
Programming
Erasing
The programming program that includes the initialization routine and the erasing program that
includes the initialization routine are each 3 Kbytes or less. Accordingly, when the CPU clock
frequency is 20 MHz, the download for each program takes approximately 10 ms at maximum.
The intervals for executing the user branch processing differs in programming and erasing. The
processing phase also differs. Table 22.11 lists the maximum intervals for initiating the user
branch processing when the CPU clock frequency is 80 MHz.
While an instruction in on-chip RAM is being executed, the DTC can write to the SCO bit in
FCCS that is used for a download request or FMATS that is used for MAT switching. Make
sure that these registers are not accidentally written to, otherwise an on-chip program may be
downloaded and destroy RAM or a MAT switchover may occur and the CPU get out of
control.
In the following modes or period, interrupt requests are ignored; they are not executed and the
interrupt sources are not retained.
 Boot mode
 Programmer mode
Other Notes
Maximum Interval
Approximately 2 ms
Approximately 15 ms
Max.
Approximately 2 ms
Approximately 15 ms
Rev. 1.00 Sep. 21, 2007 Page 947 of 1124
Section 22 Flash Memory
REJ09B0402-0100