r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 592

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Section 14 Serial Communication Interface (SCI)
14.4.2
In asynchronous mode, each transmitted or received character begins with a start bit and ends with
a stop bit. Serial communication is synchronized one character at a time.
The transmitting and receiving sections of the SCI are independent, so full duplex communication
is possible. Both the transmitter and receiver have a double-buffered structure so that data can be
read or written during transmission or reception, enabling continuous data transfer.
Figure 14.2 shows the general format of asynchronous serial communication. In asynchronous
serial communication, the communication line is normally held in the mark (high) state. The SCI
monitors the line and starts serial communication when the line goes to the space (low) state,
indicating a start bit. One serial character consists of a start bit (low), data (LSB first), parity bit
(high or low), and stop bit (high), in that order.
When receiving in asynchronous mode, the SCI synchronizes at the falling edge of the start bit.
The SCI samples each data bit on the eighth pulse of a clock with a frequency 16 times the bit rate.
Receive data is latched at the center of each bit.
Rev. 1.00 Sep. 21, 2007 Page 566 of 1124
REJ09B0402-0100
Serial
data
Operation in Asynchronous Mode
Figure 14.2 Example of Data Format in Asynchronous Communication
1
Start
bit
1 bit
0
LSB
D0
(8-Bit Data with Parity and Two Stop Bits)
One unit of transfer data (character or frame)
D1
D2
Transmit/receive data
D3
7 or 8 bits
D4
D5
D6
MSB
D7
Parity
bit
1 bit or
none
0/1
Stop bit
1
1 or 2 bits
1
(mark state)
Idle state
1