r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 569

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Bit
2
1, 0
Bit Name
TEIE
CKE[1:0]
Initial
value
0
00
R/W
R/W
R/W
Description
Transmit End Interrupt Enable
Enables or disables a transmit end interrupt (TEI) to be
issued when no valid transmit data is found in SCTDR
during MSB data transmission.
TEI can be canceled by clearing the TEND flag to 0 (by
clearing the TDRE flag in SCSSR to 0 after reading
TDRE = 1) or by clearing the TEIE bit to 0.
0: Transmit end interrupt request (TEI) is disabled
1: Transmit end interrupt request (TEI) is enabled
Clock Enable 1 and 0
Select the SCI clock source and enable or disable clock
output from the SCK pin. Depending on the
combination of CKE1 and CKE0, the SCK pin can be
used for serial clock output or serial clock input.
When selecting the clock output in clock synchronous
mode, set the C/A bit in SCSMR to 1 and then set bits
CKE1 and CKE0. For details on clock source selection,
refer to table 14.14 in section 14.4, Operation.
•
00: Internal clock, SCK pin used for input pin (The input
01: Internal clock, SCK pin used for clock output*
10: External clock, SCK pin used for clock input*
11: External clock, SCK pin used for clock input*
•
00: Internal clock, SCK pin used for synchronous clock
01: Internal clock, SCK pin used for synchronous clock
10: External clock, SCK pin used for synchronous clock
11: External clock, SCK pin used for synchronous clock
Notes: 1. The output clock frequency is 16 times the
Asynchronous mode
Clock synchronous mode
signal is ignored.)
output
output
input
input
2. The input clock frequency is 16 times the bit
bit rate.
rate.
Section 14 Serial Communication Interface (SCI)
Rev. 1.00 Sep. 21, 2007 Page 543 of 1124
REJ09B0402-0100
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