r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 559

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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This LSI has three independent serial communication interface (SCI) channels. The SCI can
handle both asynchronous and clock synchronous serial communication. In asynchronous serial
communication mode, serial data communication can be carried out with standard asynchronous
communication chips such as a Universal Asynchronous Receiver/Transmitter (UART) or
Asynchronous Communication Interface Adapter (ACIA). A function is also provided for serial
communication between processors (multiprocessor communication function).
14.1
• Choice of asynchronous or clock synchronous serial communication mode
• Asynchronous mode:
• Clock synchronous mode:
• Full duplex communication: The transmitting and receiving sections are independent, so the
• On-chip baud rate generator with selectable bit rates
• Internal or external transmit/receive clock source: From either baud rate generator (internal
• Choice of LSB-first or MSB-first data transfer (except for 7-bit data in asynchronous mode)
 Serial data communication is performed by start-stop in character units. The SCIF can
 Data length: 7 or 8 bits
 Stop bit length: 1 or 2 bits
 Parity: Even, odd, or none
 Multiprocessor communications
 Receive error detection: Parity, overrun, and framing errors
 Break detection: Break is detected by reading the RXD pin level directly when a framing
 Serial data communication is synchronized with a clock signal. The SCIF can communicate
 Data length: 8 bits
 Receive error detection: Overrun errors
SCI can transmit and receive simultaneously. Both sections use double buffering, so high-
speed continuous data transfer is possible in both the transmit and receive directions.
clock) or SCK pin (external clock)
communicate with a universal asynchronous receiver/transmitter (UART), an asynchronous
communication interface adapter (ACIA), or any other communications chip that employs
a standard asynchronous serial system. There are twelve selectable serial data
communication formats.
error occurs.
with other chips having a clock synchronous communication function.
Section 14 Serial Communication Interface (SCI)
Features
Section 14 Serial Communication Interface (SCI)
Rev. 1.00 Sep. 21, 2007 Page 533 of 1124
REJ09B0402-0100

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