r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 117
r5f71374an80fpv
Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F71374AN80FPV.pdf
(1154 pages)
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5.8.4
Some specifications on slot illegal instruction exception handling in this LSI differ from those of
the conventional SH-2.
• Conventional SH-2: Instructions LDC Rm,SR and LDC.L @Rm+,SR are not subject to the slot
• This LSI: Instructions LDC Rm,SR and LDC.L @Rm+,SR are subject to the slot illegal
The supporting status on our software products regarding this note is as follows:
Compiler
This instruction is not allocated in the delay slot in the compiler V.4 and its subsequent versions.
Real-time OS for µITRON specifications
1. HI7000/4, HI-SH7
2. HI7000
3. Others
Note that a check-up program (checker) to pick up this instruction is available on our website.
Download and utilize this checker as needed.
illegal instructions.
instructions.
This instruction does not exist in the delay slot within the OS.
This instruction is in part allocated to the delay slot within the OS, which may cause the slot
illegal instruction exception handling in this LSI.
The slot illegal instruction exception handling may be generated in this LSI in a case where the
instruction is described in assembler or when the middleware of the object is introduced.
Notes on Slot Illegal Instruction Exception Handling
Rev. 1.00 Sep. 21, 2007 Page 91 of 1124
Section 5 Exception Handling
REJ09B0402-0100
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