r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 742
r5f71374an80fpv
Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F71374AN80FPV.pdf
(1154 pages)
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Section 18 Compare Match Timer (CMT)
Notes: 1. Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
Rev. 1.00 Sep. 21, 2007 Page 716 of 1124
REJ09B0402-0100
Bit
15 to 8
7
6
5 to 2
1, 0
2. If the flag is set by another compare match before writing 0 to the bit after reading it as
Bit Name
CMF
CMIE
CKS[1:0]
1, the flag will not be cleared by writing 0 to it once. In this case, read the bit as 1 again
and write 0 to it.
00
Initial
value
All 0
0
0
All 0
R/W
R
(R/W)*
R/W
R
R/W
1
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Compare Match Flag
Indicates whether or not the values of CMCNT and
CMCOR match.
0: CMCNT and CMCOR values do not match
[Clearing conditions]
•
•
[Setting condition]
1: CMCNT and CMCOR values match
Compare Match Interrupt Enable
Enables or disables compare match interrupt (CMI)
generation when CMCNT and CMCOR values match
(CMF=1).
0: Compare match interrupt (CMI) disabled
1: Compare match interrupt (CMI) enabled
Reserved
These bits are always read as 0. The write value should
always be 0.
Clock Select 1 and 0
Select the clock to be input to CMCNT from four internal
clocks obtained by dividing the peripheral operating
clock (Pφ). When the STR bit in CMSTR is set to 1,
CMCNT starts counting on the clock selected with bits
CKS1 and CKS0.
00: Pφ/8
01: Pφ/32
10: Pφ/128
11: Pφ/512
When 0 is written to this bit after reading CMF=1*
When CMT registers are accessed when the value
of the DISEL bit of MRB in the DTC is 0 after
activating the DTC by CMI interrupts.
2
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