r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 640

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 15 Synchronous Serial Communication Unit (SSU)
15.3.8
SSRDR is an 8-bit register that stores receive data. When 8-bit data length is selected by bits
DATS1 and DATS0 in SSCRL, SSRDR0 is valid. When 16-bit data length is selected, SSRDR0
and SSRDR1 are valid. When 32-bit data length is selected, SSRDR0 to SSRDR3 are valid. Do
not access SSRDR that is not valid.
When the SSU has received 1-byte data, it transfers the received serial data from SSTRSR to
SSRDR where it is stored. After this, SSTRSR is ready for reception. Since SSTRSR and SSRDR
function as a double buffer in this way, consecutive receive operations can be performed.
Read SSRDR after confirming that the RDRF bit in SSSR is set to 1.
SSRDR is a read-only register, therefore, cannot be written to by the CPU.
Table 15.4 Setting of DATS Bit in SSCRL and Corresponding SSRDR
Rev. 1.00 Sep. 21, 2007 Page 614 of 1124
REJ09B0402-0100
Bit
7 to 0
SSRDR0
SSRDR1
SSRDR2
SSRDR3
Bit Name
SS Receive Data Registers 0 to 3 (SSRDR0 to SSRDR3)
00
Valid
Invalid
Invalid
Invalid
Initial
Value
All 0
Initial value:
R/W:
Bit:
R/W
R
R
7
0
01
Valid
Valid
Invalid
Invalid
R
6
0
Description
Serial receive data
R
5
0
DATS[1:0] Setting
R
4
0
R
3
0
10
Valid
Valid
Valid
Valid
R
2
0
R
1
0
R
0
0
11 (Invalid setting)
Invalid
Invalid
Invalid
Invalid

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