r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 684

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 16 I
16.3.7
ICDRT is an 8-bit readable/writable register that stores the transmit data. When ICDRT detects the
space in the shift register (ICDRS), it transfers the transmit data which is written in ICDRT to
ICDRS and starts transferring data. If the next transfer data is written to ICDRT during
transferring data of ICDRS, continuous transfer is possible. If ICDRT is written to and then read
while the MLS bit in ICMR is set to 1, data is read in the reversed order (MSB–LSB order is
reversed). ICDRT is initialized to H'FF.
16.3.8
ICDRR is an 8-bit register that stores the receive data. When data of one byte is received, ICDRR
transfers the receive data from ICDRS to ICDRR and the next data can be received. ICDRR is a
receive-only register, therefore the CPU cannot write to this register. ICDRR is initialized to H'FF.
16.3.9
ICDRS is a register that is used to transfer/receive data. In transmission, data is transferred from
ICDRT to ICDRS and the data is sent from the SDA pin. In reception, data is transferred from
ICDRS to ICDRR after data of one byte is received. This register cannot be read directly from the
CPU.
Rev. 1.00 Sep. 21, 2007 Page 658 of 1124
REJ09B0402-0100
I
I
I
2
2
2
2
C Bus Transmit Data Register (ICDRT)
C Bus Receive Data Register (ICDRR)
C Bus Shift Register (ICDRS)
C Bus Interface 2 (I
Initial value:
Initial value:
Initial value:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
2
C2)
R/W
R/W
7
1
7
1
7
-
-
R/W
R/W
6
1
6
1
6
-
-
R/W
R/W
5
1
5
1
5
-
-
R/W
R/W
4
1
4
1
4
-
-
R/W
R/W
3
1
3
1
3
-
-
R/W
R/W
2
1
2
1
2
-
-
R/W
R/W
1
1
1
1
1
-
-
R/W
R/W
0
1
0
1
0
-
-

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