r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 62

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Section 2 CPU
The instruction code, operation, and execution cycles of the instructions are listed in the following
tables, classified by type.
Notes: 1. The table shows the minimum number of execution states. In practice, the number of
Rev. 1.00 Sep. 21, 2007 Page 36 of 1124
REJ09B0402-0100
Instruction
Indicated by mnemonic.
Explanation of Symbols
OP.Sz SRC, DEST
Rm: Source register
Rn: Destination
imm: Immediate data
disp: Displacement*
OP:
Sz:
SRC: Source
DEST: Destination
register
Operation code
Size
2.
•
•
instruction execution states will be increased in cases such as the following:
Scaled (×1, ×2, or ×4) according to the instruction operand size, etc.
For details, see SH-1/SH-2/SH-DSP Software Manual.
When there is contention between an instruction fetch and a data access
When the destination register of a load instruction (memory → register) is also used
by the following instruction
2
Instruction Code
Indicated in MSB ↔
LSB order.
Explanation of Symbols
mmmm: Source register
nnnn: Destination
iiii:
dddd: Displacement
register
0000: R0
0001: R1
.........
1111: R15
Immediate data
Summary of
Operation
Indicates summary of
operation.
Explanation of Symbols
→, ←: Transfer direction
(xx):
M/Q/T: Flag bits in SR
&:
|:
^:
–:
<<n: n-bit left shift
>>n: n-bit right shift
Logical AND of each bit
Logical OR of each bit
Exclusive logical OR of
each bit
Logical NOT of each bit
Memory operand
Execution
Cycles
Value when no
wait cycles are
inserted *
1
T Bit
Value of T bit after
instruction is executed
Explanation of Symbols
: No change