r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 308

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
10.3.6
The TSR registers are 8-bit readable/writable registers that indicate the status of each channel. The
MTU2 has seven TSR registers, two for channel 0 and one each for channels 1 to 5.
• TSR_0, TSR_1, TSR_2, TSR_3, TSR_4
Rev. 1.00 Sep. 21, 2007 Page 282 of 1124
REJ09B0402-0100
Bit
7
6
5
Bit Name
TCFD
—
TCFU
Timer Status Register (TSR)
Note:
1.
Initial value:
Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
Initial
Value
1
1
0
R/W:
Bit:
TCFD
R
7
1
R/W
R
R
R/(W)*
R
6
1
-
1
R/(W)*
Description
Count Direction Flag
Status flag that shows the direction in which TCNT
counts in channels 1 to 4.
In channel 0, bit 7 is reserved. It is always read as 1 and
the write value should always be 1.
0: TCNT counts down
1: TCNT counts up
Reserved
This bit is always read as 1. The write value should
always be 1.
Underflow Flag
Status flag that indicates that TCNT underflow has
occurred when channels 1 and 2 are set to phase
counting mode. Only 0 can be written, for flag clearing.
In channels 0, 3, and 4, bit 5 is reserved. It is always
read as 0 and the write value should always be 0.
[Setting condition]
•
[Clearing condition]
•
TCFU
5
0
When the TCNT value underflows (changes from
H'0000 to H'FFFF)
When 0 is written to TCFU after reading TCFU = 1*
1
R/(W)*
TCFV
4
0
1
R/(W)*
TGFD
3
0
1
R/(W)*
TGFC
2
0
1
R/(W)*
TGFB
1
0
1
R/(W)*
TGFA
0
0
1
2