r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 615

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

No
No
No
Figure 14.18 Sample Multiprocessor Serial Reception Flowchart (1)
Read receive data in SCRDR
Read receive data in SCRDR
Set MPIE bit in SCSCR to 1
Read ORER and FER flags
Read RDRF flag in SCSSR
Read ORER and FER flags
Read RDRF flag in SCSSR
Clear RE bit in SCSCR to 0
FER = 1? or ORER = 1?
FER = 1? or ORER = 1?
All data received?
This station’s ID?
Start reception
Initialization
RDRF = 1?
RDRF = 1?
in SCSSR
in SCSSR
<End>
Yes
Yes
Yes
Yes
No
No
Yes
No
Yes
Error processing
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Section 14 Serial Communication Interface (SCI)
SCI initialization:
Set the RXD pin using the PFC.
ID reception cycle:
Set the MPIE bit in SCSCR to 1.
SCI status check, ID reception and
comparison:
Read SCSSR and check that the RDRF flag is
set to 1, then read the receive data in SCRDR
and compare it with this station’s ID.
If the data is not this station’s ID, set the MPIE
bit to 1 again, and clear the RDRF flag to 0.
If the data is this station’s ID, clear the RDRF
flag to 0.
SCI status check and data reception:
Read SCSSR and check that the RDRF flag is
set to 1, then read the data in SCRDR.
Receive error processing and break detection:
If a receive error occurs, read the ORER and
FER flags in SCSSR to identify the error.
After performing the appropriate error
processing, ensure that the ORER and FER
flags are all cleared to 0.
Reception cannot be resumed if either of
these flags is set to 1.
In the case of a framing error, a break can be
detected by reading the RXD pin value.
Rev. 1.00 Sep. 21, 2007 Page 589 of 1124
REJ09B0402-0100