r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 570

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Section 14 Serial Communication Interface (SCI)
14.3.7
SCSSR is an 8-bit register that contains status flags to indicate the SCI operating state.
The CPU can always read and write to SCSSR, but cannot write 1 to status flags TDRE, RDRF,
ORER, PER, and FER. These flags can be cleared to 0 only after 1 is read from the flags. The
TEND flag is a read-only bit and cannot be modified.
Rev. 1.00 Sep. 21, 2007 Page 544 of 1124
REJ09B0402-0100
Bit
7
Serial Status Register (SCSSR)
Bit Name
TDRE
Note:
*
Initial value:
Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
Initial
value
1
R/W:
Bit:
R/(W)* R/(W)* R/(W)* R/(W)* R/(W)*
TDRE
7
1
R/W
R/(W)* Transmit Data Register Empty
RDRF ORER
6
0
5
0
Description
Indicates whether data has been transferred from the
transmit data register (SCTDR) to the transmit shift
register (SCTSR) and SCTDR has become ready to
be written with next serial transmit data.
0: Indicates that SCTDR holds valid transmit data
[Clearing conditions]
•
•
1: Indicates that SCTDR does not hold valid transmit
[Setting conditions]
•
•
•
data
When 0 is written to TDRE after reading TDRE = 1
When the DTC is activated by a TXI interrupt and
transmit data is transferred to SCTDR while the
DISEL bit of MRB in the DTC is 0
By a power-on reset or in standby mode
When the TE bit in SCSCR is 0
When data is transferred from SCTDR to SCTSR
and data can be written to SCTDR
FER
4
0
PER
3
0
TEND
R
2
1
MPB
R
1
0
MPBT
R/W
0
0