r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 19

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

15.5 SSU Interrupt Sources and DTC ........................................................................................ 638
15.6 Usage Notes ....................................................................................................................... 639
Section 16 I
16.1 Features.............................................................................................................................. 641
16.2 Input/Output Pins ............................................................................................................... 644
16.3 Register Descriptions ......................................................................................................... 645
16.4 Operation ........................................................................................................................... 660
16.5 I
16.6 Operation Using the DTC .................................................................................................. 680
16.7 Bit Synchronous Circuit..................................................................................................... 681
16.8 Usage Note......................................................................................................................... 683
15.4.7 Clock Synchronous Communication Mode .......................................................... 632
15.6.1 Module Standby Mode Setting ............................................................................. 639
15.6.2 Access to SSTDR and SSRDR Registers.............................................................. 639
15.6.3 Continuous Transmission/Reception in SSU Slave Mode .................................... 639
16.3.1 I
16.3.2 I
16.3.3 I
16.3.4 I
16.3.5 I
16.3.6 I
16.3.7 I
16.3.8 I
16.3.9 I
16.3.10 NF2CYC Register (NF2CYC) .............................................................................. 659
16.4.1 I
16.4.2 Master Transmit Operation ................................................................................... 661
16.4.3 Master Receive Operation..................................................................................... 663
16.4.4 Slave Transmit Operation ..................................................................................... 666
16.4.5 Slave Receive Operation....................................................................................... 669
16.4.6 Clock Synchronous Serial Format ........................................................................ 670
16.4.7 Noise Filter ........................................................................................................... 674
16.4.8 Example of Use..................................................................................................... 675
16.8.1 Module Standby Mode Setting ............................................................................. 683
16.8.2 Issuance of Stop Condition and Repeated Start Condition ................................... 683
16.8.3 Issuance of a Start Condition and Stop Condition in Sequence ............................ 683
16.8.4 Settings for Multi-Master Operation..................................................................... 684
16.8.5 Reading ICDRR in Master Receive Mode............................................................ 684
16.8.6 Supported Emulator .............................................................................................. 684
2
C2 Interrupt Sources........................................................................................................ 679
2
2
2
2
2
2
2
2
2
2
2
C Bus Control Register 1 (ICCR1)..................................................................... 645
C Bus Control Register 2 (ICCR2)..................................................................... 648
C Bus Mode Register (ICMR)............................................................................ 650
C Bus Interrupt Enable Register (ICIER) ........................................................... 652
C Bus Status Register (ICSR)............................................................................. 654
C Bus Slave Address Register (SAR)................................................................. 657
C Bus Transmit Data Register (ICDRT)............................................................. 658
C Bus Receive Data Register (ICDRR).............................................................. 658
C Bus Shift Register (ICDRS)............................................................................ 658
C Bus Format...................................................................................................... 660
C Bus Interface 2 (I
2
C2) ................................................................641
Rev. 1.00 Sep. 21, 2007 Page xix of xxvi