r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 226

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Section 8 Data Transfer Controller (DTC)
8.9.5
The transfer information start address to be specified in the vector table should be address 4n.
Transfer information should be placed in on-chip RAM or external memory space.
8.9.6
Do not access the DTC registers by using DTC operation.
8.9.7
• The IRQ interrupt specified as a DTC activation source must not be used to cancel software
• The IRQ edge input in software standby mode must not be specified as a DTC activation
• When a low level on the IRQ pin is to be detected, if the end of DTC transfer is used to request
8.9.8
• When the TXI interrupt from the SCI is specified as a DTC activation source, the TEND flag
8.9.9
The interrupt source flag set when the DTC transfer is completed should be cleared in the interrupt
handler in the same way as for general interrupt source flags. For details, refer to section 6.9,
Usage Note.
8.9.10
When a conflict occurs between the generation of the NMI interrupt and the DTC activation, the
NMI interrupt has priority. Thus the ERR bit is set to 1 and the DTC is not activated.
It takes 1 × Bcyc + 3 × Pcyc for determining DTC stop by NMI, 2 × Bcyc for determining DTC
activation by IRQ, and 1 × Pcyc for determining DTC activation by peripheral modules.
Rev. 1.00 Sep. 21, 2007 Page 200 of 1124
REJ09B0402-0100
standby mode.
source.
an interrupt to the CPU (transfer counter = 0 or DISEL = 1), the IRQ signal must be kept low
until the CPU accepts the interrupt.
in the SCI must not be used as the transfer end flag.
Transfer Information Start Address, Source Address, and Destination Address
Access to DTC Registers through DTC
Notes on IRQ Interrupt as DTC Activation Source
Notes on SCI as DTC Activation Sources
Clearing Interrupt Source Flag
Conflict between NMI Interrupt and DTC Activation