r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 12

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Section 7 User Break Controller (UBC)............................................................ 121
7.1
7.2
7.3
7.4
7.5
Section 8 Data Transfer Controller (DTC)........................................................ 157
8.1
8.2
Rev. 1.00 Sep. 21, 2007 Page xii of xxvi
Features.............................................................................................................................. 121
Input/Output Pins............................................................................................................... 123
Register Descriptions......................................................................................................... 124
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.3.7
7.3.8
7.3.9
7.3.10 Break Bus Cycle Register B (BBRB) ................................................................... 134
7.3.11 Break Control Register (BRCR) ........................................................................... 136
7.3.12 Execution Times Break Register (BETR)............................................................. 141
7.3.13 Branch Source Register (BRSR)........................................................................... 142
7.3.14 Branch Destination Register (BRDR)................................................................... 143
Operation ........................................................................................................................... 144
7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
7.4.6
7.4.7
Usage Notes ....................................................................................................................... 154
Features.............................................................................................................................. 157
Register Descriptions......................................................................................................... 159
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.2.7
8.2.8
Break Address Register A (BARA)...................................................................... 125
Break Address Mask Register A (BAMRA)......................................................... 125
Break Bus Cycle Register A (BBRA)................................................................... 126
Break Data Register A (BDRA) ........................................................................... 128
Break Data Mask Register A (BDMRA) .............................................................. 129
Break Address Register B (BARB) ...................................................................... 130
Break Address Mask Register B (BAMRB) ......................................................... 131
Break Data Register B (BDRB)............................................................................ 132
Break Data Mask Register B (BDMRB)............................................................... 133
Flow of the User Break Operation ........................................................................ 144
User Break on Instruction Fetch Cycle ................................................................. 145
Break on Data Access Cycle................................................................................. 146
Sequential Break................................................................................................... 147
Value of Saved Program Counter ......................................................................... 147
PC Trace ............................................................................................................... 148
Usage Examples.................................................................................................... 149
DTC Mode Register A (MRA) ............................................................................. 160
DTC Mode Register B (MRB).............................................................................. 161
DTC Source Address Register (SAR)................................................................... 163
DTC Destination Address Register (DAR)........................................................... 163
DTC Transfer Count Register A (CRA) ............................................................... 164
DTC Transfer Count Register B (CRB)................................................................ 165
DTC Enable Registers A to E (DTCERA to DTCERE) ....................................... 166
DTC Control Register (DTCCR) .......................................................................... 167