r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 427

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

3. Buffer Transfer Control Linked with Interrupt Skipping
Note: This function must always be used in combination with interrupt skipping.
In complementary PWM mode, whether to transfer data from a buffer register to a temporary
register and whether to link the transfer with interrupt skipping can be specified with the BTE1
and BTE0 bits in the timer buffer transfer set register (TBTER).
Figure 10.76 shows an example of operation when buffer transfer is suppressed (BTE1 = 0 and
BTE0 = 1). While this setting is valid, data is not transferred from the buffer register to the
temporary register.
Figure 10.77 shows an example of operation when buffer transfer is linked with interrupt
skipping (BTE1 = 1 and BET0 = 0). While this setting is valid, data is not transferred from the
buffer register outside the buffer transfer-enabled period.
Note that the buffer transfer-enabled period depends on the T3AEN and T4VEN bit settings in
the timer interrupt skipping set register (TITCR). Figure 10.78 shows the relationship between
the T3AEN and T4VEN bit settings in TITCR and buffer transfer-enabled period.
When interrupt skipping is disabled (the T3AEN and T4VEN bits in the timer interrupt
skipping set register (TITCR) are cleared to 0 or the skipping count set bits (3ACOR and
4VCOR) in TITCR are cleared to 0), make sure that buffer transfer is not linked with
interrupt skipping (clear the BTE1 bit in the timer buffer transfer set register (TBTER) to
0). If buffer transfer is linked with interrupt skipping while interrupt skipping is disabled,
buffer transfer is never performed.
Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 1.00 Sep. 21, 2007 Page 401 of 1124
REJ09B0402-0100